The present invention relates to a communication control apparatus and method which execute a data communication process via, e.g., a predetermined communication medium, and a storage medium that stores a computer readable program.
Conventionally, when a data transfer process is done via versatile parallel ports between various types of data processing apparatuses, it is a common practice to make asynchronous transfer, e.g., transfer based on handshake control using a control signal nStrobe and status signal Busy. With this scheme, the sender side confirms before transfer of each byte of data if the signal Busy is xe2x80x9cLxe2x80x9d (Low level). If the signal Busy is xe2x80x9cLxe2x80x9d, the sender side outputs 1-byte data, and then outputs xe2x80x9cLxe2x80x9d as a control nStrobe signal. The receiver side confirms that the signal nStrobe goes xe2x80x9cLxe2x80x9d, and then sets the signal Busy at xe2x80x9cHxe2x80x9d (High level) to receive data. Upon completion of data reception, the receiver side resets the signal Busy to xe2x80x9cLxe2x80x9d.
Since a general personal computer cannot execute this handshake control by hardware, it executes that control by software and cannot transfer data at high speed.
To solve this problem, a method of implementing high-speed data transfer by hardware handshake control like ECP mode transfer specified by the IEEE standards xe2x80x9cIEEE Std 1284-1994xe2x80x9d is known.
However, since this method requires dedicated hardware, only a computer which comprises this hardware can transfer data at high speed.
Also, a method that allows high-speed transfer by obviating the need for handshake control in units of bytes using, as a clock bit, one fixed bit of 8-bit data transferred by a data transfer apparatus via a parallel port has been proposed.
However, since this method uses one bit as a clock bit, only 7 bits can be sent per transfer.
As described in Japanese Patent Laid-Open No. 9-505421, a data transfer method that uses an arbitrary bit as a clock bit without fixing the clock bit is also available. In this method, since the receiver side cannot generate any clock if successive byte data assume identical values, byte data having a fixed value is inserted between neighboring byte data having identical values.
In data which is runlength-encoded in units of bytes, length and data bytes appear at neighboring locations. For this reason, when neighboring byte data assume identical values as a result of encoding, the value of the length byte is decreased by unity. In this manner, since successive byte data are controlled not to have identical values, clocks are generated from data, thus allowing high-speed transfer.
However, in the former method, since fixed byte data is inserted to avoid byte data having identical values from being successively transferred, the size of data to be transferred increases. In the latter method, since the length byte value is decreased by unity, the compression ratio suffers. Also, in the latter method, since data of two successive bytes having identical values must be encoded to a repeat command, the compression ratio suffers. For example, a case will be examined below wherein 3-byte data xe2x80x9cAABxe2x80x9d is runlength-encoded. In this case, when xe2x80x9cAAxe2x80x9d is encoded to a xe2x80x9ccode (1 byte) indicating a runlength=2+Axe2x80x9d, and xe2x80x9cBxe2x80x9d is encoded to a xe2x80x9ccode (1 byte) indicating raw data with unity length+Bxe2x80x9d, source 3-byte data is converted into 4-byte codes. In this manner, when runlength encoding is simply applied, the compression ratio impairs. For this reason, it is a common practice to prevent the compression ratio from impairing by encoding xe2x80x9cAAxe2x80x9d as raw data in place of a repeat command. However, since the above method inhibits identical code bytes from successively appearing, a string xe2x80x9cAAxe2x80x9d must be runlength-encoded, and the compression ratio cannot be prevented from impairing.
The present invention has been made to solve the aforementioned problems, and has as its object to provide a communication control apparatus and method, in which the sender side encodes data to be sent so that a certain value does not successively appear and the encoded data has a size smaller than source data and then sends the encoded data, and the receiver side receives data while generating a clock signal from the received data signal, thus allowing high-speed data transfer, and preventing the data size to be transferred from increasing.
In order to achieve the above object, according to the present invention, the sender side encodes data not to generate encoded data having a predetermined value upon sending data, makes an arithmetic operation to prevent encoded data having identical values from successively appearing, and then sends encoded data. The receiver side generates a clock based on a change in received data value, and receives data in synchronism with that clock.
The present invention comprises the following arrangement. That is, an apparatus of the present invention comprises:
a parallel port having a plurality of data signal lines, at least one control signal line, and at least one status signal line;
clock generation means for generating a clock signal by detecting a change in arbitrary data signal at the parallel port;
a register for temporarily storing a data signal received via the parallel port when the clock generation means generates the clock signal;
an arithmetic device for making an arithmetic operation of data temporarily stored in the register before and after the clock signal is generated by the clock generation means, and outputting an operated result;
storage means for storing the operated result output from the arithmetic device; and
reception ready status signal output means for outputting a reception ready status signal indicating whether or not the storage means has a predetermined free area onto the status or data signal line of the parallel port.
Alternatively, an apparatus of the present invention comprises:
a parallel port having a plurality of data signal lines, at least one control signal line, and at least one status signal line;
encoding means for generating encoded data not to include a predetermined value by analyzing source data to be externally transferred via the parallel port;
arithmetic means for making a predetermined arithmetic operation of the encoded data generated by the encoding means and outputting an operated result; and
communication means for outputting data of the operated result output from the arithmetic means onto the data signal line of the parallel port when a reception ready status signal output from an apparatus connected to the parallel port indicates that it is ready to receive data having a predetermined size.
Alternatively, a communication control apparatus for sending data to a receiving apparatus for generating a reception clock in response to a change in data value via a parallel interface with a predetermined width, comprising:
encoding means for encoding parallel data to be sent not to include a specific value;
arithmetic means for making an arithmetic operation of the parallel data encoded by the encoding means with neighboring data having different values; and
means for sending the data that have undergone the arithmetic operation of the arithmetic means via the parallel interface.
Other features and advantages of the present invention will be apparent from the following description taken in conjunction with the accompanying drawings, in which like reference characters designate the same or similar parts throughout the figures thereof.